/usr/local/lib64/python3.6/site-packages/torch/include/ATen/native/cuda
NameSizeModeActions
BatchLinearAlgebraLib.h31140644editdlrm
block_reduce.cuh25490644editdlrm
CompositeRandomAccessor.h9290644editdlrm
CUDALoops.cuh75980644editdlrm
CuFFTPlanCache.h192820644editdlrm
CuFFTUtils.h18920644editdlrm
DeviceSqrt.cuh5850644editdlrm
DistributionTemplates.h274350644editdlrm
EmbeddingBackwardKernel.cuh7150644editdlrm
ForeachFunctors.cuh168510644editdlrm
GridSampler.cuh113160644editdlrm
im2col.cuh65770644editdlrm
KernelUtils.cuh25530644editdlrm
LaunchUtils.h3060644editdlrm
Loops.cuh99970644editdlrm
Math.cuh138400644editdlrm
MemoryAccess.cuh124630644editdlrm
MiscUtils.h33410644editdlrm
MultiTensorApply.cuh75520644editdlrm
Normalization.cuh744410644editdlrm
PersistentSoftmax.cuh146350644editdlrm
Randperm.cuh21140644editdlrm
Reduce.cuh387840644editdlrm
Resize.cuh19190644editdlrm
ROCmLoops.cuh135260644editdlrm
SortingCommon.cuh56880644editdlrm
SortingRadixSelect.cuh119180644editdlrm
SortUtils.cuh55490644editdlrm
TensorModeKernel.cuh143910644editdlrm
UniqueCub.cuh3450644editdlrm
UpSample.cuh75520644editdlrm
vol2col.cuh82970644editdlrm
Edit: /usr/local/lib64/python3.6/site-packages/torch/include/ATen/native/cuda/block_reduce.cuh (2549B)
#pragma once #include #include #include namespace at { namespace native { namespace cuda_utils { constexpr int kCUDABlockReduceNumThreads = 512; // Algorithmic limitation: BlockReduce does two WarpReduce calls, each // of which reduces C10_WARP_SIZE elements. So, at most // C10_WARP_SIZE**2 elements can be reduced at a time. // NOTE: This is >= the max block size on current hardware anyway (1024). constexpr int kCUDABlockReduceMaxThreads = C10_WARP_SIZE * C10_WARP_SIZE; // Sums `val` accross all threads in a warp. // // Assumptions: // - The size of each block should be a multiple of `C10_WARP_SIZE` template __inline__ __device__ T WarpReduceSum(T val) { #pragma unroll for (int offset = (C10_WARP_SIZE >> 1); offset > 0; offset >>= 1) { val += WARP_SHFL_DOWN(val, offset); } return val; } // Sums `val` accross all threads in a block. // // Assumptions: // - Thread blocks are an 1D set of threads (indexed with `threadIdx.x` only) // - The size of each block should be a multiple of `C10_WARP_SIZE` // - `shared` should be a pointer to shared memory with size of, at least, // `sizeof(T) * number_of_warps` template __inline__ __device__ T BlockReduceSum(T val, T* shared) { const int lid = threadIdx.x % C10_WARP_SIZE; const int wid = threadIdx.x / C10_WARP_SIZE; val = WarpReduceSum(val); __syncthreads(); if (lid == 0) { shared[wid] = val; } __syncthreads(); val = (threadIdx.x < blockDim.x / C10_WARP_SIZE) ? shared[lid] : T(0); if (wid == 0) { val = WarpReduceSum(val); } return val; } template __inline__ __device__ T WarpReduce(T val, const ReduceOp& op) { #pragma unroll for (int offset = (C10_WARP_SIZE >> 1); offset > 0; offset >>= 1) { val = op.combine(val, op.warp_shfl_down(val, offset)); } return val; } template __inline__ __device__ T BlockReduce(T val, const ReduceOp& op, const T& identity_element, T* shared) { const int lid = threadIdx.x % C10_WARP_SIZE; const int wid = threadIdx.x / C10_WARP_SIZE; val = WarpReduce(val, op); __syncthreads(); if (lid == 0) { shared[wid] = val; } __syncthreads(); val = (threadIdx.x < blockDim.x / C10_WARP_SIZE) ? shared[lid] : identity_element; if (wid == 0) { val = WarpReduce(val, op); } return val; } } // namespace cuda_utils } // namespace native } // namespace at