/usr/local/lib64/python3.6/site-packages/torch/include/c10/core
NameSizeModeActions
impl/-0755rm
Allocator.h87250644editdlrm
AutogradState.h9940644editdlrm
Backend.h84870644editdlrm
CompileTimeFunctionPointer.h16770644editdlrm
CopyBytes.h12290644editdlrm
CPUAllocator.h22670644editdlrm
DefaultDtype.h3940644editdlrm
DefaultTensorOptions.h10320644editdlrm
Device.h53960644editdlrm
DeviceGuard.h75550644editdlrm
DeviceType.h29940644editdlrm
DispatchKey.h180690644editdlrm
DispatchKeySet.h129510644editdlrm
Event.h41690644editdlrm
GeneratorImpl.h37130644editdlrm
GradMode.h12610644editdlrm
InferenceMode.h34710644editdlrm
Layout.h12250644editdlrm
MemoryFormat.h85710644editdlrm
OptionalRef.h5210644editdlrm
QEngine.h8610644editdlrm
QScheme.h15620644editdlrm
Scalar.h60190644editdlrm
ScalarType.h170730644editdlrm
ScalarTypeToTypeMeta.h13650644editdlrm
Storage.h43690644editdlrm
StorageImpl.h56100644editdlrm
Stream.h73730644editdlrm
StreamGuard.h63150644editdlrm
TensorImpl.h961520644editdlrm
TensorOptions.h275930644editdlrm
thread_pool.h29920644editdlrm
UndefinedTensorImpl.h9110644editdlrm
WrapDimMinimal.h8050644editdlrm
Edit: /usr/local/lib64/python3.6/site-packages/torch/include/c10/core/DefaultTensorOptions.h (1032B)
#pragma once #include #include #include #include namespace c10 { struct TensorOptions; /// Like TensorOptions, but all fields are guaranteed to be filled. struct DefaultTensorOptions { DefaultTensorOptions() = default; caffe2::TypeMeta dtype() const noexcept { return dtype_; } Device device() const noexcept { return device_; } Layout layout() const noexcept { return layout_; } bool requires_grad() const noexcept { return requires_grad_; } // Defined in TensorOptions.h inline DefaultTensorOptions& merge(const TensorOptions& options); private: caffe2::TypeMeta dtype_ = caffe2::TypeMeta::Make(); // 64-bit Device device_ = at::kCPU; // 32-bit Layout layout_ = at::kStrided; // 8-bit bool requires_grad_ = false; // 8-bit }; inline const DefaultTensorOptions& getDefaultTensorOptions() { static const auto options = DefaultTensorOptions(); return options; } } // namespace c10